Hardware and Architectural Support for Security and Privacy (HASP) 2024

Co-located with MICRO 2024, November 2, Austin, Texas, USA

The workshop proceedings are available here.

Although much attention has been directed to the study of security at the system and application levels, security and privacy research focusing on hardware and architecture aspects is still a new frontier. In the era of cloud computing, smart devices, and novel nano-scale devices, practitioners and researchers have to address new challenges and requirements in order to meet the ever-changing landscape of security research and new demands from consumers, enterprises, governments, defense and other industries.

HASP is intended to bring together researchers, developers, and practitioners from academia and industry, to share practical implementations and experiences related to all aspects of hardware and architectural support for security and privacy, and to discuss future trends in research and applications. To that end, papers are solicited from the areas, including, but not limited to:

Secure hardware processor architectures and implementations
Side-channel attacks, evaluations, and defenses
Secure cache designs and evaluation, focusing on side-channels
Commercial TEE systems and security solutions
Hardware-enhanced cloud security
Security of emerging architectures, such as Quantum Computers
Hardware support for secure Internet-of-Things
Smartphone hardware security
Hardware fingerprinting and PUFs
Hardware and architectural support for trust management
Hardware trojan threat evaluation, detection, and prevention
Attack resilient hardware and architectural design
Cryptographic hardware design, implementation, and evaluation
Security simulation, testing, validation and verification

Authors can submit the following types of papers:

Regular Paper (8 Pages, including the bibliography and appendices)
- Research Paper
- SoK: Systemization-of-Knowledge papers should concisely, but exhaustively, systematize and conceptualize existing knowledge (similar to SoK papers in S&P conferences, but focusing on hardware and architecture). Papers should use "SoK Paper:" as their title prefix.
- Position Paper: Position papers should define new problems in hardware or architecture security and privacy topics. Papers should use "Position Paper:" as their title prefix.
Short Paper (4 Pages, including the bibliography and appendices)
- Research Paper: Papers should use "Short Paper:" as their title prefix.
- WiP: Papers should use "WiP:" as their title prefix. Work-in-Progress papers will not appear in the proceedings, but the title and authors will be listed on the HASP web page as a public record of the presentation.

Submission Deadline: Aug. 15, 2024 (extended deadline) by end of day Anywhere on Earth (AoE)

Notification of Acceptance: Sep. 16, 2024

Camera-Ready Version: Sep. 30, 2024

Physical Workshop: Nov. 2, 2024

All submissions must be using the double-column ACM ICPS template. LaTeX template is preferred. Please use the ACM Standard template in the usual two-column format. The template can be found here.

The submissions should be anonymized for double-blind review.

Regular submissions (Research paper, SoK, position paper) must be at most 8 pages including the bibliography and appendices (these papers may be recommended for acceptance as short 4 page papers during the review process, but full-length papers should be initially submitted if authors want to be considered for a full-length paper publication). Short papers (Research paper, WiP) must be at most 4 pages including the bibliography and appendices.

All accepted reserch papers, SoK papers, position papers will be included in the ACM Digital Library; WiP papers are not included. The proceedings will be published through ACM ICPS and available through the ACM Digital Library.

Papers can be submitted on the EasyChair web page: https://easychair.org/conferences/?conf=hasp2024.

Reinforcement Learning for Microarchitectural Security: Cache Timing Channel, Speculative Execution, and Defense
Mulong Luo (The University of Texas at Austin)

Mulong Luo is currently a postdoctoral researcher at the University of Texas at Austin hosted by Mohit Tiwari. His research interests lie broadly in applying AI methods for computer architecture and system security, as well as improving the security of AI systems including LLM and autonomous vehicles. He is selected as a CPS Rising Star 2023. His paper is selected as a finalist in Top Picks in Hardware and Embedded Security 2022. He is also awarded the best paper award at CPS-SPC 2018. Mulong received Ph.D. at Cornell University advised by Edward Suh in 2023. He got his MS and BS from UCSD and Peking University respectively.

From Confidential Computing to Zero Trust, Come Along for the (Bumpy?) Ride
Mengmei Ye (IBM)

Mengmei Ye is a Staff Research Scientist working on Confidential Computing and Cloud Infrastructure at IBM T.J. Watson Research Center. She received her Ph.D. degree in Electrical and Computer Engineering from Rutgers University in 2021. Her research work has been recognized with a Distinguished Paper with Artifacts Award at ACSAC 2023, a Best Paper Award at IEEE ICCD 2016, and a Best Paper Nomination at IEEE HOST 2018.

Lightening the Shadows: Metadata-Light Exploit Mitigation Based on Novel Cryptography and X86
Michael LeMay (Intel)

Michael LeMay is a Senior Staff Research Scientist in Intel Labs Security and Privacy Research who focuses on memory safety and exploit mitigation. He contributed to several Intel processor security features and open-source exploit mitigation technologies. Michael was Principal Investigator for Intel's Cryptographic Capability Computing (C3) project in the DARPA HARDEN program. He also served as Intel's final lead liaison to the SRC JUMP CONIX research center. Michael received his Ph.D. in Computer Science from the University of Illinois at Urbana-Champaign in 2011 and is a Senior Member of the ACM and IEEE.

The Secure Processor Paradox: When Security Metadata Worsens Microarchitecture Security
Fan Yao (University of Central Florida)

Fan Yao is an Associate professor in the Department of Electrical and Computer Engineering at University of Central Florida. He is leading the Computer Architecture and Systems Research (CASR) lab. His research interests are in the areas of computer architecture, security, machine learning, and energy efficient computing.

HASP 2024 will also organize a mentoring program, which provides student attendees opportunities to get connected with senior researchers individually, and have conversations about their research and career. They will be paired up with faculty/postdoc mentors for meetings during the workshop/conference, and any follow-ups afterward.