Hardware and Architectural Support for Security and Privacy (HASP) 2025

Tentatively co-located with MICRO 2025, October, Seoul, Korea

Although much attention has been directed to the study of security at the system and application levels, security and privacy research focusing on hardware and architecture aspects is still a new frontier. In the era of cloud computing, smart devices, and novel nano-scale devices, practitioners and researchers have to address new challenges and requirements in order to meet the ever-changing landscape of security research and new demands from consumers, enterprises, governments, defense and other industries.

HASP is intended to bring together researchers, developers, and practitioners from academia and industry, to share practical implementations and experiences related to all aspects of hardware and architectural support for security and privacy, and to discuss future trends in research and applications. To that end, papers are solicited from the areas, including, but not limited to:

Secure hardware processor architectures and implementations
Side-channel attacks, evaluations, and defenses
Secure cache designs and evaluation, focusing on side-channels
Commercial TEE systems and security solutions
Hardware-enhanced cloud security
Security of emerging architectures, such as Quantum Computers
Hardware support for secure Internet-of-Things
Smartphone hardware security
Hardware fingerprinting and PUFs
Hardware and architectural support for trust management
Hardware trojan threat evaluation, detection, and prevention
Attack resilient hardware and architectural design
Cryptographic hardware design, implementation, and evaluation
Security simulation, testing, validation and verification

Authors can submit the following types of papers:

Regular Paper (8 Pages, including the bibliography and appendices)
- Research Paper
- SoK: Systemization-of-Knowledge papers should concisely, but exhaustively, systematize and conceptualize existing knowledge (similar to SoK papers in S&P conferences, but focusing on hardware and architecture). Papers should use "SoK Paper:" as their title prefix.
- Position Paper: Position papers should define new problems in hardware or architecture security and privacy topics. Papers should use "Position Paper:" as their title prefix.
Short Paper (4 Pages, including the bibliography and appendices)
- Research Paper: Papers should use "Short Paper:" as their title prefix.
- WiP: Papers should use "WiP:" as their title prefix. Work-in-Progress papers will not appear in the proceedings, but the title and authors will be listed on the HASP web page as a public record of the presentation.

Submission Deadline: Jul. 27, 2025 by end of day Anywhere on Earth (AoE)

Notification of Acceptance: Sep. 2, 2025

Camera-Ready Version: Sep. 15, 2025

Physical Workshop: Oct. 18 or 19, 2025 (Tentative)

All submissions must be using the double-column ACM ICPS template. LaTeX template is preferred. Please use the ACM Standard template in the usual two-column format. The template can be found here.

The submissions should be anonymized for double-blind review.

Regular submissions (Research paper, SoK, position paper) must be at most 8 pages including the bibliography and appendices (these papers may be recommended for acceptance as short 4 page papers during the review process, but full-length papers should be initially submitted if authors want to be considered for a full-length paper publication). Short papers (Research paper, WiP) must be at most 4 pages including the bibliography and appendices.

All accepted reserch papers, SoK papers, position papers will be included in the ACM Digital Library; WiP papers are not included. The proceedings will be published through ACM ICPS and available through the ACM Digital Library.

Papers can be submitted on the EasyChair web page: TBD.

TBD

HASP 2025 will also organize a mentoring program, which provides student attendees opportunities to get connected with senior researchers individually, and have conversations about their research and career. They will be paired up with faculty/postdoc mentors for meetings during the workshop/conference, and any follow-ups afterward.